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<a href="#nested-classes">Data Structures</a> &#124;
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_clk___wiz___config.html">XClk_Wiz_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The configuration structure for CLK_WIZ Controller This structure passes the hardware building information to the driver.  <a href="struct_x_clk___wiz___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> driver instance data.  <a href="struct_x_clk___wiz.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gaa454fd2cfc7ed730c52b747b72de71ef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaa454fd2cfc7ed730c52b747b72de71ef">XCLK_WIZ_IER_ALLINTR_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:gaa454fd2cfc7ed730c52b747b72de71ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupts enable mask.  <a href="#gaa454fd2cfc7ed730c52b747b72de71ef">More...</a><br/></td></tr>
<tr class="separator:gaa454fd2cfc7ed730c52b747b72de71ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18e65431f48acae3734420b5f3ffa490"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga18e65431f48acae3734420b5f3ffa490">XCLK_WIZ_IER_ALLINTR_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga18e65431f48acae3734420b5f3ffa490"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupts enable shift bits.  <a href="#ga18e65431f48acae3734420b5f3ffa490">More...</a><br/></td></tr>
<tr class="separator:ga18e65431f48acae3734420b5f3ffa490"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8e1db287d69d02c673140eae664c1a34"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga8e1db287d69d02c673140eae664c1a34">XCLK_WIZ_ISR_ALLINTR_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:ga8e1db287d69d02c673140eae664c1a34"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupt status register mask.  <a href="#ga8e1db287d69d02c673140eae664c1a34">More...</a><br/></td></tr>
<tr class="separator:ga8e1db287d69d02c673140eae664c1a34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga757264554263d3e4035a7433e43ade17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga757264554263d3e4035a7433e43ade17">XCLK_WIZ_ISR_ALLINTR_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga757264554263d3e4035a7433e43ade17"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupts status register shift.  <a href="#ga757264554263d3e4035a7433e43ade17">More...</a><br/></td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:ga96bd226f11dc053a8db6732c1c0e2001"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga96bd226f11dc053a8db6732c1c0e2001">XClk_Wiz_CallBack</a> )(void *CallBackRef, u32 Mask)</td></tr>
<tr class="memdesc:ga96bd226f11dc053a8db6732c1c0e2001"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type for all interrupts defined.  <a href="#ga96bd226f11dc053a8db6732c1c0e2001">More...</a><br/></td></tr>
<tr class="separator:ga96bd226f11dc053a8db6732c1c0e2001"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga96e21929b605502ed7b693c0a2132b4e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga96e21929b605502ed7b693c0a2132b4e">XClk_Wiz_CfgInitialize</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, <a class="el" href="struct_x_clk___wiz___config.html">XClk_Wiz_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga96e21929b605502ed7b693c0a2132b4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance provided by the caller based on the given Config structure.  <a href="#ga96e21929b605502ed7b693c0a2132b4e">More...</a><br/></td></tr>
<tr class="separator:ga96e21929b605502ed7b693c0a2132b4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7cee7daf22c90c1209ffb89da7dbc5bb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga7cee7daf22c90c1209ffb89da7dbc5bb">XClk_Wiz_SetMinErr</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u64 Minerr)</td></tr>
<tr class="memdesc:ga7cee7daf22c90c1209ffb89da7dbc5bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Minimum error that can be tolerated.  <a href="#ga7cee7daf22c90c1209ffb89da7dbc5bb">More...</a><br/></td></tr>
<tr class="separator:ga7cee7daf22c90c1209ffb89da7dbc5bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0408e2c4fba6d9237aeb72db5c38164b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0408e2c4fba6d9237aeb72db5c38164b">XClk_Wiz_SetRateHz</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u64 SetRate)</td></tr>
<tr class="memdesc:ga0408e2c4fba6d9237aeb72db5c38164b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Change the frequency to the given rate in Hz.  <a href="#ga0408e2c4fba6d9237aeb72db5c38164b">More...</a><br/></td></tr>
<tr class="separator:ga0408e2c4fba6d9237aeb72db5c38164b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5da48627691e7e979b7c4fbcb608796a"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga5da48627691e7e979b7c4fbcb608796a">XClk_Wiz_GetRate</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 ClockId, u64 *Rate)</td></tr>
<tr class="memdesc:ga5da48627691e7e979b7c4fbcb608796a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the clock frequency for the given ClockId.  <a href="#ga5da48627691e7e979b7c4fbcb608796a">More...</a><br/></td></tr>
<tr class="separator:ga5da48627691e7e979b7c4fbcb608796a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad966194a45d93fa34d0eb8ab8c2de08d"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gad966194a45d93fa34d0eb8ab8c2de08d">XClk_Wiz_SetLeafRateHz</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 ClockId, u64 SetRate)</td></tr>
<tr class="memdesc:gad966194a45d93fa34d0eb8ab8c2de08d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the clock rate frequency for the given ClockId.  <a href="#gad966194a45d93fa34d0eb8ab8c2de08d">More...</a><br/></td></tr>
<tr class="separator:gad966194a45d93fa34d0eb8ab8c2de08d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadaf78e2da6e9c9dc9bd7a86f97d6b79e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gadaf78e2da6e9c9dc9bd7a86f97d6b79e">XClk_Wiz_SetRate</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u64 SetRate)</td></tr>
<tr class="memdesc:gadaf78e2da6e9c9dc9bd7a86f97d6b79e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Change the frequency to the given rate.  <a href="#gadaf78e2da6e9c9dc9bd7a86f97d6b79e">More...</a><br/></td></tr>
<tr class="separator:gadaf78e2da6e9c9dc9bd7a86f97d6b79e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0965f9b5b43c453ca70e8b43f03490ca"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0965f9b5b43c453ca70e8b43f03490ca">XClk_Wiz_EnableClock</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 ClockId)</td></tr>
<tr class="memdesc:ga0965f9b5b43c453ca70e8b43f03490ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Clock for the given ClockId.  <a href="#ga0965f9b5b43c453ca70e8b43f03490ca">More...</a><br/></td></tr>
<tr class="separator:ga0965f9b5b43c453ca70e8b43f03490ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6b82e8b7e00bc66dd233345a4cb5c41"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gac6b82e8b7e00bc66dd233345a4cb5c41">XClk_Wiz_DisableClock</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 ClockId)</td></tr>
<tr class="memdesc:gac6b82e8b7e00bc66dd233345a4cb5c41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable Clock for the given ClockId.  <a href="#gac6b82e8b7e00bc66dd233345a4cb5c41">More...</a><br/></td></tr>
<tr class="separator:gac6b82e8b7e00bc66dd233345a4cb5c41"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf581607624ee4f19e501ff7802101db"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gacf581607624ee4f19e501ff7802101db">XClk_Wiz_WaitForLock</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr)</td></tr>
<tr class="memdesc:gacf581607624ee4f19e501ff7802101db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait till the clocking wizard is locked to the frequency.  <a href="#gacf581607624ee4f19e501ff7802101db">More...</a><br/></td></tr>
<tr class="separator:gacf581607624ee4f19e501ff7802101db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0456881555560b358b47fb336542a4d3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0456881555560b358b47fb336542a4d3">XClk_Wiz_SetInputRate</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, double Rate)</td></tr>
<tr class="memdesc:ga0456881555560b358b47fb336542a4d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Change the Input frequency to the given rate.  <a href="#ga0456881555560b358b47fb336542a4d3">More...</a><br/></td></tr>
<tr class="separator:ga0456881555560b358b47fb336542a4d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ad6007a242ec441ccb612d7ff2050c0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga3ad6007a242ec441ccb612d7ff2050c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">XClk_Wiz_GetInterruptSettings will get the information from clock wizard IER and ISR Registers.  <a href="#ga3ad6007a242ec441ccb612d7ff2050c0">More...</a><br/></td></tr>
<tr class="separator:ga3ad6007a242ec441ccb612d7ff2050c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga862887391d91e336afb089947d1eea22"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_clk___wiz___config.html">XClk_Wiz_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga862887391d91e336afb089947d1eea22">XClk_Wiz_LookupConfig</a> (u32 DeviceId)</td></tr>
<tr class="memdesc:ga862887391d91e336afb089947d1eea22"><td class="mdescLeft">&#160;</td><td class="mdescRight">Look up the hardware configuration for a device instance.  <a href="#ga862887391d91e336afb089947d1eea22">More...</a><br/></td></tr>
<tr class="separator:ga862887391d91e336afb089947d1eea22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga57d65e65942c50b405b79dacf4704339"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga57d65e65942c50b405b79dacf4704339">XClk_Wiz_SetCallBack</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 HandleType, void *CallBackFunc, void *CallBackRef)</td></tr>
<tr class="memdesc:ga57d65e65942c50b405b79dacf4704339"><td class="mdescLeft">&#160;</td><td class="mdescRight">This routine installs an asynchronous callback function for the given HandlerType:  <a href="#ga57d65e65942c50b405b79dacf4704339">More...</a><br/></td></tr>
<tr class="separator:ga57d65e65942c50b405b79dacf4704339"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f547fb0dce8abc367979e38081a5080"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga4f547fb0dce8abc367979e38081a5080">XClk_Wiz_InterruptEnable</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga4f547fb0dce8abc367979e38081a5080"><td class="mdescLeft">&#160;</td><td class="mdescRight">XClk_Wiz_InterruptEnable will enable the interrupts present in the interrupt mask passed onto the function.  <a href="#ga4f547fb0dce8abc367979e38081a5080">More...</a><br/></td></tr>
<tr class="separator:ga4f547fb0dce8abc367979e38081a5080"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab75c6d3b3e928e8cfcf136e93cdf20b2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab75c6d3b3e928e8cfcf136e93cdf20b2">XClk_Wiz_InterruptDisable</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:gab75c6d3b3e928e8cfcf136e93cdf20b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">XClk_Wiz_InterruptDisable will disable the interrupts present in the interrupt mask passed onto the function.  <a href="#gab75c6d3b3e928e8cfcf136e93cdf20b2">More...</a><br/></td></tr>
<tr class="separator:gab75c6d3b3e928e8cfcf136e93cdf20b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad9cbda03df42d37371a19800efb6ec13"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gad9cbda03df42d37371a19800efb6ec13">XClk_Wiz_InterruptGetEnabled</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr)</td></tr>
<tr class="memdesc:gad9cbda03df42d37371a19800efb6ec13"><td class="mdescLeft">&#160;</td><td class="mdescRight">XClk_Wiz_InterruptGetEnabled will get the interrupt mask set (enabled) in the CLK_WIZ core.  <a href="#gad9cbda03df42d37371a19800efb6ec13">More...</a><br/></td></tr>
<tr class="separator:gad9cbda03df42d37371a19800efb6ec13"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5850b23acf450ae86fcc514f052256e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaf5850b23acf450ae86fcc514f052256e">XClk_Wiz_InterruptGetStatus</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf5850b23acf450ae86fcc514f052256e"><td class="mdescLeft">&#160;</td><td class="mdescRight">XClk_Wiz_InterruptGetStatus will get the list of interrupts pending in the Interrupt Status Register of the CLK_WIZ core.  <a href="#gaf5850b23acf450ae86fcc514f052256e">More...</a><br/></td></tr>
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<tr class="memitem:gab48767fd035d10bd40cec167cdd7778d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab48767fd035d10bd40cec167cdd7778d">XClk_Wiz_InterruptClear</a> (<a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:gab48767fd035d10bd40cec167cdd7778d"><td class="mdescLeft">&#160;</td><td class="mdescRight">XClk_Wiz_InterruptClear will clear the interrupts set in the Interrupt Status Register of the CLK_WIZ core.  <a href="#gab48767fd035d10bd40cec167cdd7778d">More...</a><br/></td></tr>
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<tr class="memitem:gab4d4ca4b2b5d036b0e0df621692135f6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:gab4d4ca4b2b5d036b0e0df621692135f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the CLK_WIZ core.  <a href="#gab4d4ca4b2b5d036b0e0df621692135f6">More...</a><br/></td></tr>
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Interrupt Types for setting Callbacks</h2></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_HANDLER_CLK_OUTOF_RANGE</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_HANDLER_CLK_GLITCH</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_HANDLER_CLK_STOP</b>&#160;&#160;&#160;3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_HANDLER_CLK_OTHER_ERROR</b>&#160;&#160;&#160;4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_M_MIN</b>&#160;&#160;&#160;4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_M_MAX</b>&#160;&#160;&#160;432</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_D_MIN</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_D_MAX</b>&#160;&#160;&#160;123</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_VCO_MIN</b>&#160;&#160;&#160;2160</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_VCO_MAX</b>&#160;&#160;&#160;4320</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_O_MIN</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_O_MAX</b>&#160;&#160;&#160;511</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_VCO_MAX</b>&#160;&#160;&#160;1600</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_VCO_MIN</b>&#160;&#160;&#160;800</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_M_MIN</b>&#160;&#160;&#160;2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_M_MAX</b>&#160;&#160;&#160;128</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_D_MAX</b>&#160;&#160;&#160;106</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_D_MIN</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_O_MAX</b>&#160;&#160;&#160;128</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_US_O_MIN</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_MHZ</b>&#160;&#160;&#160;1000000</td></tr>
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Device registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpe905567f3f1e4630e21d2f8192509576"></a>Register sets of CLK_WIZ </p>
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<tr class="memitem:ga1130a3203681c537950cc8229a696105"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga1130a3203681c537950cc8229a696105">XCLK_WIZ_STATUS_OFFSET</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga1130a3203681c537950cc8229a696105"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status Register.  <a href="#ga1130a3203681c537950cc8229a696105">More...</a><br/></td></tr>
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<tr class="memitem:ga54bfc49d1a188b798cb96cfd40a0dc54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga54bfc49d1a188b798cb96cfd40a0dc54">XCLK_WIZ_ISR_OFFSET</a>&#160;&#160;&#160;0x0000000C</td></tr>
<tr class="memdesc:ga54bfc49d1a188b798cb96cfd40a0dc54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Status Register.  <a href="#ga54bfc49d1a188b798cb96cfd40a0dc54">More...</a><br/></td></tr>
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<tr class="memitem:gaab5f77647fad82a4c02eb29b8180f89b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaab5f77647fad82a4c02eb29b8180f89b">XCLK_WIZ_IER_OFFSET</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gaab5f77647fad82a4c02eb29b8180f89b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Enable Register.  <a href="#gaab5f77647fad82a4c02eb29b8180f89b">More...</a><br/></td></tr>
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<tr class="memitem:ga8d853c1eaeeb4b89d06b7de0ff13d999"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga8d853c1eaeeb4b89d06b7de0ff13d999">XCLK_WIZ_RECONFIG_OFFSET</a>&#160;&#160;&#160;0x00000014</td></tr>
<tr class="memdesc:ga8d853c1eaeeb4b89d06b7de0ff13d999"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reconfig Register.  <a href="#ga8d853c1eaeeb4b89d06b7de0ff13d999">More...</a><br/></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG1_OFFSET</b>&#160;&#160;&#160;0x00000330</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG2_OFFSET</b>&#160;&#160;&#160;0x00000334</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG3_OFFSET</b>&#160;&#160;&#160;0x00000338</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG4_OFFSET</b>&#160;&#160;&#160;0x0000033C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG12_OFFSET</b>&#160;&#160;&#160;0x00000380</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG13_OFFSET</b>&#160;&#160;&#160;0x00000384</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG11_OFFSET</b>&#160;&#160;&#160;0x00000378</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG14_OFFSET</b>&#160;&#160;&#160;0x00000398</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG15_OFFSET</b>&#160;&#160;&#160;0x0000039C</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG16_OFFSET</b>&#160;&#160;&#160;0x000003A0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG17_OFFSET</b>&#160;&#160;&#160;0x000003A8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG19_OFFSET</b>&#160;&#160;&#160;0x000003CC</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG25_OFFSET</b>&#160;&#160;&#160;0x000003F0</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG26_OFFSET</b>&#160;&#160;&#160;0x000003FC</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_ZYNQMP_REG0_OFFSET</b>&#160;&#160;&#160;0x00000200</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_ZYNQMP_REG2_OFFSET</b>&#160;&#160;&#160;0x00000208</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG0_FBMULT_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG0_FBMULT_WIDTH</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG0_FBMULT_MASK</b>&#160;&#160;&#160;0xFF00</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG0_DIV_MASK</b>&#160;&#160;&#160;0xFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG0_DIV_WIDTH</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG2_DIV_MASK</b>&#160;&#160;&#160;0xFF</td></tr>
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<tr class="memitem:gafa257e031d2c60c9fdd568df2fa023d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gafa257e031d2c60c9fdd568df2fa023d0">XCLK_WIZ_REG1_EDGE_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gafa257e031d2c60c9fdd568df2fa023d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for Edge.  <a href="#gafa257e031d2c60c9fdd568df2fa023d0">More...</a><br/></td></tr>
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<tr class="memitem:gafa257e031d2c60c9fdd568df2fa023d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gafa257e031d2c60c9fdd568df2fa023d0">XCLK_WIZ_REG1_EDGE_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gafa257e031d2c60c9fdd568df2fa023d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for Edge.  <a href="#gafa257e031d2c60c9fdd568df2fa023d0">More...</a><br/></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_REG1_EDGE_MASK</b>&#160;&#160;&#160;0x100</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_CLKFBOUT_L_MASK</b>&#160;&#160;&#160;0xFF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_CLKFBOUT_H_MASK</b>&#160;&#160;&#160;0xFF00</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_CLKFBOUT_H_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_EDGE_MASK</b>&#160;&#160;&#160;(1 &lt;&lt; 10) /** Edge */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_P5EN_MASK</b>&#160;&#160;&#160;(1 &lt;&lt; 8)  /** p5en */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_LOCK</b>&#160;&#160;&#160;1    /** Lock */</td></tr>
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<tr class="memitem:ga0e335ce1a067f54477c247e74a4dbc3d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0e335ce1a067f54477c247e74a4dbc3d">XCLK_WIZ_REG3_PREDIV2</a>&#160;&#160;&#160;(1 &lt;&lt; 11)</td></tr>
<tr class="memdesc:ga0e335ce1a067f54477c247e74a4dbc3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prediv2 3.  <a href="#ga0e335ce1a067f54477c247e74a4dbc3d">More...</a><br/></td></tr>
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<tr class="memitem:ga9c0c8a7ada27a0cfba39c0f3aa922c7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga9c0c8a7ada27a0cfba39c0f3aa922c7d">XCLK_WIZ_REG3_USED</a>&#160;&#160;&#160;(1 &lt;&lt; 12)</td></tr>
<tr class="memdesc:ga9c0c8a7ada27a0cfba39c0f3aa922c7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prediv2 3.  <a href="#ga9c0c8a7ada27a0cfba39c0f3aa922c7d">More...</a><br/></td></tr>
<tr class="separator:ga9c0c8a7ada27a0cfba39c0f3aa922c7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2ce6c2a6375c78f8b9923d2330941dae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga2ce6c2a6375c78f8b9923d2330941dae">XCLK_WIZ_REG3_MX</a>&#160;&#160;&#160;(1 &lt;&lt; 9)</td></tr>
<tr class="memdesc:ga2ce6c2a6375c78f8b9923d2330941dae"><td class="mdescLeft">&#160;</td><td class="mdescRight">MX.  <a href="#ga2ce6c2a6375c78f8b9923d2330941dae">More...</a><br/></td></tr>
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<tr class="memitem:ga92d4bacb8f557d499888a14e1c48b3c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga92d4bacb8f557d499888a14e1c48b3c9">XCLK_WIZ_REG1_PREDIV2</a>&#160;&#160;&#160;(1 &lt;&lt; 12)</td></tr>
<tr class="memdesc:ga92d4bacb8f557d499888a14e1c48b3c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prediv2 3.  <a href="#ga92d4bacb8f557d499888a14e1c48b3c9">More...</a><br/></td></tr>
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<tr class="memitem:ga8162c60bfa65bf8e6856f4ab94845337"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga8162c60bfa65bf8e6856f4ab94845337">XCLK_WIZ_REG1_EN</a>&#160;&#160;&#160;(1 &lt;&lt; 9)</td></tr>
<tr class="memdesc:ga8162c60bfa65bf8e6856f4ab94845337"><td class="mdescLeft">&#160;</td><td class="mdescRight">FBout enable.  <a href="#ga8162c60bfa65bf8e6856f4ab94845337">More...</a><br/></td></tr>
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<tr class="memitem:ga901c3adb5465cdf153c4b0d1a51e3bd9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga901c3adb5465cdf153c4b0d1a51e3bd9">XCLK_WIZ_REG1_MX</a>&#160;&#160;&#160;(1 &lt;&lt; 10)</td></tr>
<tr class="memdesc:ga901c3adb5465cdf153c4b0d1a51e3bd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">MX 3.  <a href="#ga901c3adb5465cdf153c4b0d1a51e3bd9">More...</a><br/></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_RECONFIG_LOAD</b>&#160;&#160;&#160;1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XCLK_WIZ_RECONFIG_SADDR</b>&#160;&#160;&#160;2</td></tr>
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<tr class="memitem:ga26c3e66c06696502f24f013c0da90e55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga26c3e66c06696502f24f013c0da90e55">XCLK_WIZ_CLKOUT0_PREDIV2_SHIFT</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:ga26c3e66c06696502f24f013c0da90e55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for Prediv2.  <a href="#ga26c3e66c06696502f24f013c0da90e55">More...</a><br/></td></tr>
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<tr class="memitem:ga5b78de754a5a563c46cc4364b9698488"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga5b78de754a5a563c46cc4364b9698488">XCLK_WIZ_CLKOUT0_MX_SHIFT</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:ga5b78de754a5a563c46cc4364b9698488"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for MUX.  <a href="#ga5b78de754a5a563c46cc4364b9698488">More...</a><br/></td></tr>
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<tr class="memitem:gac7482b3e0a5b624637346bee0811515d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gac7482b3e0a5b624637346bee0811515d">XCLK_WIZ_CLKOUT0_P5EN_SHIFT</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:gac7482b3e0a5b624637346bee0811515d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for P5EN.  <a href="#gac7482b3e0a5b624637346bee0811515d">More...</a><br/></td></tr>
<tr class="separator:gac7482b3e0a5b624637346bee0811515d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae49b1d691b76f209b89e751b7d091d43"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gae49b1d691b76f209b89e751b7d091d43">XCLK_WIZ_CLKOUT0_P5FEDGE_SHIFT</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:gae49b1d691b76f209b89e751b7d091d43"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for P5EDGE.  <a href="#gae49b1d691b76f209b89e751b7d091d43">More...</a><br/></td></tr>
<tr class="separator:gae49b1d691b76f209b89e751b7d091d43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae826d18d7971be10836d3804ad4ed38e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gae826d18d7971be10836d3804ad4ed38e">XCLK_WIZ_CLKOUT0_P5FEDGE_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; 15)</td></tr>
<tr class="memdesc:gae826d18d7971be10836d3804ad4ed38e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask for P5EDGE.  <a href="#gae826d18d7971be10836d3804ad4ed38e">More...</a><br/></td></tr>
<tr class="separator:gae826d18d7971be10836d3804ad4ed38e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga142028c206e507df8633d0b91b0ef273"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga142028c206e507df8633d0b91b0ef273">XCLK_WIZ_REG12_EDGE_SHIFT</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:ga142028c206e507df8633d0b91b0ef273"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for Edge.  <a href="#ga142028c206e507df8633d0b91b0ef273">More...</a><br/></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Bitmasks and offsets of XCLK_WIZ_ISR_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpa369e334da09a9d6fa6973639537c59e"></a>This register is used to display interrupt status register </p>
</td></tr>
<tr class="memitem:ga6a11cf2b70a1598342cde6ad50577ec9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga6a11cf2b70a1598342cde6ad50577ec9">XCLK_WIZ_ISR_CLK3_STOP_MASK</a>&#160;&#160;&#160;0x00008000</td></tr>
<tr class="memdesc:ga6a11cf2b70a1598342cde6ad50577ec9"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 stopped.  <a href="#ga6a11cf2b70a1598342cde6ad50577ec9">More...</a><br/></td></tr>
<tr class="separator:ga6a11cf2b70a1598342cde6ad50577ec9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab7ecb70f6cf41fd44769722fdcf2a6a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab7ecb70f6cf41fd44769722fdcf2a6a6">XCLK_WIZ_ISR_CLK2_STOP_MASK</a>&#160;&#160;&#160;0x00004000</td></tr>
<tr class="memdesc:gab7ecb70f6cf41fd44769722fdcf2a6a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 stopped.  <a href="#gab7ecb70f6cf41fd44769722fdcf2a6a6">More...</a><br/></td></tr>
<tr class="separator:gab7ecb70f6cf41fd44769722fdcf2a6a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7152a10657a3caeef169c0be28087362"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga7152a10657a3caeef169c0be28087362">XCLK_WIZ_ISR_CLK1_STOP_MASK</a>&#160;&#160;&#160;0x00002000</td></tr>
<tr class="memdesc:ga7152a10657a3caeef169c0be28087362"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 stopped.  <a href="#ga7152a10657a3caeef169c0be28087362">More...</a><br/></td></tr>
<tr class="separator:ga7152a10657a3caeef169c0be28087362"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga29f231a7715e94baec2277b768f5f1a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga29f231a7715e94baec2277b768f5f1a5">XCLK_WIZ_ISR_CLK0_STOP_MASK</a>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="memdesc:ga29f231a7715e94baec2277b768f5f1a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 stopped.  <a href="#ga29f231a7715e94baec2277b768f5f1a5">More...</a><br/></td></tr>
<tr class="separator:ga29f231a7715e94baec2277b768f5f1a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5634a366b8ced209061e028c163fddd5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga5634a366b8ced209061e028c163fddd5">XCLK_WIZ_ISR_CLK3_GLITCH_MASK</a>&#160;&#160;&#160;0x00000800</td></tr>
<tr class="memdesc:ga5634a366b8ced209061e028c163fddd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 has glitch.  <a href="#ga5634a366b8ced209061e028c163fddd5">More...</a><br/></td></tr>
<tr class="separator:ga5634a366b8ced209061e028c163fddd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa79abe7629e383c5d83f09ab640a7267"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaa79abe7629e383c5d83f09ab640a7267">XCLK_WIZ_ISR_CLK2_GLITCH_MASK</a>&#160;&#160;&#160;0x00000400</td></tr>
<tr class="memdesc:gaa79abe7629e383c5d83f09ab640a7267"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 has glitch.  <a href="#gaa79abe7629e383c5d83f09ab640a7267">More...</a><br/></td></tr>
<tr class="separator:gaa79abe7629e383c5d83f09ab640a7267"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafcb540ab2c83a559450ae71633258269"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gafcb540ab2c83a559450ae71633258269">XCLK_WIZ_ISR_CLK1_GLITCH_MASK</a>&#160;&#160;&#160;0x00000200</td></tr>
<tr class="memdesc:gafcb540ab2c83a559450ae71633258269"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 has glitch.  <a href="#gafcb540ab2c83a559450ae71633258269">More...</a><br/></td></tr>
<tr class="separator:gafcb540ab2c83a559450ae71633258269"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf7f48abd562e1b1389b86bb978f091e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gabf7f48abd562e1b1389b86bb978f091e">XCLK_WIZ_ISR_CLK0_GLITCH_MASK</a>&#160;&#160;&#160;0x00000100</td></tr>
<tr class="memdesc:gabf7f48abd562e1b1389b86bb978f091e"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 has glitch.  <a href="#gabf7f48abd562e1b1389b86bb978f091e">More...</a><br/></td></tr>
<tr class="separator:gabf7f48abd562e1b1389b86bb978f091e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga163b2686ce7e37b98fc9d510a95febdb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga163b2686ce7e37b98fc9d510a95febdb">XCLK_WIZ_ISR_CLK3_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:ga163b2686ce7e37b98fc9d510a95febdb"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 is less than specification.  <a href="#ga163b2686ce7e37b98fc9d510a95febdb">More...</a><br/></td></tr>
<tr class="separator:ga163b2686ce7e37b98fc9d510a95febdb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24b899afdcc87e9a2c97eabe52fb610c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga24b899afdcc87e9a2c97eabe52fb610c">XCLK_WIZ_ISR_CLK2_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:ga24b899afdcc87e9a2c97eabe52fb610c"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 is less than specification.  <a href="#ga24b899afdcc87e9a2c97eabe52fb610c">More...</a><br/></td></tr>
<tr class="separator:ga24b899afdcc87e9a2c97eabe52fb610c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8e3dd7df0cf46c203cab6d190c9e4cd9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga8e3dd7df0cf46c203cab6d190c9e4cd9">XCLK_WIZ_ISR_CLK1_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga8e3dd7df0cf46c203cab6d190c9e4cd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 is less than specification.  <a href="#ga8e3dd7df0cf46c203cab6d190c9e4cd9">More...</a><br/></td></tr>
<tr class="separator:ga8e3dd7df0cf46c203cab6d190c9e4cd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga37ecc718da5a33c16329f6f6d1967e4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga37ecc718da5a33c16329f6f6d1967e4e">XCLK_WIZ_ISR_CLK0_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga37ecc718da5a33c16329f6f6d1967e4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 is less than specification.  <a href="#ga37ecc718da5a33c16329f6f6d1967e4e">More...</a><br/></td></tr>
<tr class="separator:ga37ecc718da5a33c16329f6f6d1967e4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a3354cec0d629d0ed3c26d28bbd1994"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga9a3354cec0d629d0ed3c26d28bbd1994">XCLK_WIZ_ISR_CLK3_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga9a3354cec0d629d0ed3c26d28bbd1994"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 is max than specification.  <a href="#ga9a3354cec0d629d0ed3c26d28bbd1994">More...</a><br/></td></tr>
<tr class="separator:ga9a3354cec0d629d0ed3c26d28bbd1994"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2cfaf083bfc11e4d527262c6dfe0c24e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga2cfaf083bfc11e4d527262c6dfe0c24e">XCLK_WIZ_ISR_CLK2_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga2cfaf083bfc11e4d527262c6dfe0c24e"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 is max than specification.  <a href="#ga2cfaf083bfc11e4d527262c6dfe0c24e">More...</a><br/></td></tr>
<tr class="separator:ga2cfaf083bfc11e4d527262c6dfe0c24e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga834ed8f9541edc0c5be94ca0de404f87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga834ed8f9541edc0c5be94ca0de404f87">XCLK_WIZ_ISR_CLK1_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga834ed8f9541edc0c5be94ca0de404f87"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 is max than specification.  <a href="#ga834ed8f9541edc0c5be94ca0de404f87">More...</a><br/></td></tr>
<tr class="separator:ga834ed8f9541edc0c5be94ca0de404f87"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e762fe87dddbe8ac453306748a216f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga5e762fe87dddbe8ac453306748a216f5">XCLK_WIZ_ISR_CLK0_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga5e762fe87dddbe8ac453306748a216f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 is max than specification.  <a href="#ga5e762fe87dddbe8ac453306748a216f5">More...</a><br/></td></tr>
<tr class="separator:ga5e762fe87dddbe8ac453306748a216f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82daa29abf414a316c26355e3771cf88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga82daa29abf414a316c26355e3771cf88">XCLK_WIZ_ISR_CLKALL_STOP_MASK</a>&#160;&#160;&#160;0x0000F000</td></tr>
<tr class="memdesc:ga82daa29abf414a316c26355e3771cf88"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock[0-3] has stopped.  <a href="#ga82daa29abf414a316c26355e3771cf88">More...</a><br/></td></tr>
<tr class="separator:ga82daa29abf414a316c26355e3771cf88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga868aa5dd6399404298d686e73a44a565"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga868aa5dd6399404298d686e73a44a565">XCLK_WIZ_ISR_CLKALL_GLITCH_MASK</a>&#160;&#160;&#160;0x00000F00</td></tr>
<tr class="memdesc:ga868aa5dd6399404298d686e73a44a565"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock[0-3] has glitch.  <a href="#ga868aa5dd6399404298d686e73a44a565">More...</a><br/></td></tr>
<tr class="separator:ga868aa5dd6399404298d686e73a44a565"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9cfc8a66cb70f62b8546fb4b9a448d50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga9cfc8a66cb70f62b8546fb4b9a448d50">XCLK_WIZ_ISR_CLKALL_MINFREQ_MASK</a>&#160;&#160;&#160;0x000000F0</td></tr>
<tr class="memdesc:ga9cfc8a66cb70f62b8546fb4b9a448d50"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock[0-3] is min than specification.  <a href="#ga9cfc8a66cb70f62b8546fb4b9a448d50">More...</a><br/></td></tr>
<tr class="separator:ga9cfc8a66cb70f62b8546fb4b9a448d50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7b6a6f0f1fda56cdb7b97a293e9ee72e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga7b6a6f0f1fda56cdb7b97a293e9ee72e">XCLK_WIZ_ISR_CLKALL_MAXFREQ_MASK</a>&#160;&#160;&#160;0x0000000F</td></tr>
<tr class="memdesc:ga7b6a6f0f1fda56cdb7b97a293e9ee72e"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock[0-3] is max than specification.  <a href="#ga7b6a6f0f1fda56cdb7b97a293e9ee72e">More...</a><br/></td></tr>
<tr class="separator:ga7b6a6f0f1fda56cdb7b97a293e9ee72e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga546bf7c1903e83e52e69fbaa1d603343"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga546bf7c1903e83e52e69fbaa1d603343">XCLK_WIZ_ISR_CLK3_STOP_SHIFT</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:ga546bf7c1903e83e52e69fbaa1d603343"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 stop.  <a href="#ga546bf7c1903e83e52e69fbaa1d603343">More...</a><br/></td></tr>
<tr class="separator:ga546bf7c1903e83e52e69fbaa1d603343"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3a0cc16b3ad77228b11f05e11d6e733"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaf3a0cc16b3ad77228b11f05e11d6e733">XCLK_WIZ_ISR_CLK2_STOP_SHIFT</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:gaf3a0cc16b3ad77228b11f05e11d6e733"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 stop.  <a href="#gaf3a0cc16b3ad77228b11f05e11d6e733">More...</a><br/></td></tr>
<tr class="separator:gaf3a0cc16b3ad77228b11f05e11d6e733"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab79b4b574363916c1021f811376f1660"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab79b4b574363916c1021f811376f1660">XCLK_WIZ_ISR_CLK1_STOP_SHIFT</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:gab79b4b574363916c1021f811376f1660"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 stop.  <a href="#gab79b4b574363916c1021f811376f1660">More...</a><br/></td></tr>
<tr class="separator:gab79b4b574363916c1021f811376f1660"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f168b5c26d91d8aa5c92d7a4e922631"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0f168b5c26d91d8aa5c92d7a4e922631">XCLK_WIZ_ISR_CLK0_STOP_SHIFT</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:ga0f168b5c26d91d8aa5c92d7a4e922631"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 stop.  <a href="#ga0f168b5c26d91d8aa5c92d7a4e922631">More...</a><br/></td></tr>
<tr class="separator:ga0f168b5c26d91d8aa5c92d7a4e922631"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0914e2de55970b885f8c50667b85c8f3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0914e2de55970b885f8c50667b85c8f3">XCLK_WIZ_ISR_CLK3_GLITCH_SHIFT</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:ga0914e2de55970b885f8c50667b85c8f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 glitch.  <a href="#ga0914e2de55970b885f8c50667b85c8f3">More...</a><br/></td></tr>
<tr class="separator:ga0914e2de55970b885f8c50667b85c8f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac893b3b69a6950f520de28c97b80f149"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gac893b3b69a6950f520de28c97b80f149">XCLK_WIZ_ISR_CLK2_GLITCH_SHIFT</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:gac893b3b69a6950f520de28c97b80f149"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 glitch.  <a href="#gac893b3b69a6950f520de28c97b80f149">More...</a><br/></td></tr>
<tr class="separator:gac893b3b69a6950f520de28c97b80f149"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6cd50be9be9ce6dda280b3200d73c236"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga6cd50be9be9ce6dda280b3200d73c236">XCLK_WIZ_ISR_CLK1_GLITCH_SHIFT</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:ga6cd50be9be9ce6dda280b3200d73c236"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 glitch.  <a href="#ga6cd50be9be9ce6dda280b3200d73c236">More...</a><br/></td></tr>
<tr class="separator:ga6cd50be9be9ce6dda280b3200d73c236"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa28febc03c84cdbbffc5ea57e4124fe7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaa28febc03c84cdbbffc5ea57e4124fe7">XCLK_WIZ_ISR_CLK0_GLITCH_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gaa28febc03c84cdbbffc5ea57e4124fe7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 glitch.  <a href="#gaa28febc03c84cdbbffc5ea57e4124fe7">More...</a><br/></td></tr>
<tr class="separator:gaa28febc03c84cdbbffc5ea57e4124fe7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf702d2921c3b616066cfd2e76de620b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaf702d2921c3b616066cfd2e76de620b2">XCLK_WIZ_ISR_CLK3_MINFREQ_SHIFT</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:gaf702d2921c3b616066cfd2e76de620b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 less.  <a href="#gaf702d2921c3b616066cfd2e76de620b2">More...</a><br/></td></tr>
<tr class="separator:gaf702d2921c3b616066cfd2e76de620b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d719247c9dfed11e36dfacb58f25fb8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga4d719247c9dfed11e36dfacb58f25fb8">XCLK_WIZ_ISR_CLK2_MINFREQ_SHIFT</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ga4d719247c9dfed11e36dfacb58f25fb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 less.  <a href="#ga4d719247c9dfed11e36dfacb58f25fb8">More...</a><br/></td></tr>
<tr class="separator:ga4d719247c9dfed11e36dfacb58f25fb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4ffc8a12873db9cdcb8e31c9bfdf923"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gad4ffc8a12873db9cdcb8e31c9bfdf923">XCLK_WIZ_ISR_CLK1_MINFREQ_SHIFT</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:gad4ffc8a12873db9cdcb8e31c9bfdf923"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 less.  <a href="#gad4ffc8a12873db9cdcb8e31c9bfdf923">More...</a><br/></td></tr>
<tr class="separator:gad4ffc8a12873db9cdcb8e31c9bfdf923"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga737f9a73cb6f0fe8402585a70f35492c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga737f9a73cb6f0fe8402585a70f35492c">XCLK_WIZ_ISR_CLK0_MINFREQ_SHIFT</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ga737f9a73cb6f0fe8402585a70f35492c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 less.  <a href="#ga737f9a73cb6f0fe8402585a70f35492c">More...</a><br/></td></tr>
<tr class="separator:ga737f9a73cb6f0fe8402585a70f35492c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f70d46d84d4629688388134ebc3dca6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga5f70d46d84d4629688388134ebc3dca6">XCLK_WIZ_ISR_CLK3_MAXFREQ_SHIFT</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:ga5f70d46d84d4629688388134ebc3dca6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 max.  <a href="#ga5f70d46d84d4629688388134ebc3dca6">More...</a><br/></td></tr>
<tr class="separator:ga5f70d46d84d4629688388134ebc3dca6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac546d9f62ddcc7fc8584ef9de13d7bb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gac546d9f62ddcc7fc8584ef9de13d7bb9">XCLK_WIZ_ISR_CLK2_MAXFREQ_SHIFT</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:gac546d9f62ddcc7fc8584ef9de13d7bb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 max.  <a href="#gac546d9f62ddcc7fc8584ef9de13d7bb9">More...</a><br/></td></tr>
<tr class="separator:gac546d9f62ddcc7fc8584ef9de13d7bb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga176e2701427376ad264054f9abd3f1ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga176e2701427376ad264054f9abd3f1ba">XCLK_WIZ_ISR_CLK1_MAXFREQ_SHIFT</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga176e2701427376ad264054f9abd3f1ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 max.  <a href="#ga176e2701427376ad264054f9abd3f1ba">More...</a><br/></td></tr>
<tr class="separator:ga176e2701427376ad264054f9abd3f1ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga991df75896a6505b7d17031df5216319"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga991df75896a6505b7d17031df5216319">XCLK_WIZ_ISR_CLK0_MAXFREQ_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga991df75896a6505b7d17031df5216319"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 max.  <a href="#ga991df75896a6505b7d17031df5216319">More...</a><br/></td></tr>
<tr class="separator:ga991df75896a6505b7d17031df5216319"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Bitmasks and offsets of XCLK_WIZ_IER_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp75b9148f640eb6057c59f6e3f2bc35cb"></a>This register is used to display interrupt status register </p>
</td></tr>
<tr class="memitem:gaa19f2cd1e19eefbe675b2ca7433a6594"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaa19f2cd1e19eefbe675b2ca7433a6594">XCLK_WIZ_IER_CLK3_STOP_MASK</a>&#160;&#160;&#160;0x00008000</td></tr>
<tr class="memdesc:gaa19f2cd1e19eefbe675b2ca7433a6594"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 stopped.  <a href="#gaa19f2cd1e19eefbe675b2ca7433a6594">More...</a><br/></td></tr>
<tr class="separator:gaa19f2cd1e19eefbe675b2ca7433a6594"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa29a0866b87ef2332a9e8076676e4e11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaa29a0866b87ef2332a9e8076676e4e11">XCLK_WIZ_IER_CLK2_STOP_MASK</a>&#160;&#160;&#160;0x00004000</td></tr>
<tr class="memdesc:gaa29a0866b87ef2332a9e8076676e4e11"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 stopped.  <a href="#gaa29a0866b87ef2332a9e8076676e4e11">More...</a><br/></td></tr>
<tr class="separator:gaa29a0866b87ef2332a9e8076676e4e11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaea0e4748f55d38744ca6f95ccd68a1ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaea0e4748f55d38744ca6f95ccd68a1ad">XCLK_WIZ_IER_CLK1_STOP_MASK</a>&#160;&#160;&#160;0x00002000</td></tr>
<tr class="memdesc:gaea0e4748f55d38744ca6f95ccd68a1ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 stopped.  <a href="#gaea0e4748f55d38744ca6f95ccd68a1ad">More...</a><br/></td></tr>
<tr class="separator:gaea0e4748f55d38744ca6f95ccd68a1ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac73712dd09ff0df8c1d71a53e4c826ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gac73712dd09ff0df8c1d71a53e4c826ce">XCLK_WIZ_IER_CLK0_STOP_MASK</a>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="memdesc:gac73712dd09ff0df8c1d71a53e4c826ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 stopped.  <a href="#gac73712dd09ff0df8c1d71a53e4c826ce">More...</a><br/></td></tr>
<tr class="separator:gac73712dd09ff0df8c1d71a53e4c826ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0df64f19a3ed2d4a49889b9ca8bfbb3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0df64f19a3ed2d4a49889b9ca8bfbb3a">XCLK_WIZ_IER_CLK3_GLITCH_MASK</a>&#160;&#160;&#160;0x00000800</td></tr>
<tr class="memdesc:ga0df64f19a3ed2d4a49889b9ca8bfbb3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 has glitch.  <a href="#ga0df64f19a3ed2d4a49889b9ca8bfbb3a">More...</a><br/></td></tr>
<tr class="separator:ga0df64f19a3ed2d4a49889b9ca8bfbb3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a23825d334858f643dd8bdeeac557c8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0a23825d334858f643dd8bdeeac557c8">XCLK_WIZ_IER_CLK2_GLITCH_MASK</a>&#160;&#160;&#160;0x00000400</td></tr>
<tr class="memdesc:ga0a23825d334858f643dd8bdeeac557c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 has glitch.  <a href="#ga0a23825d334858f643dd8bdeeac557c8">More...</a><br/></td></tr>
<tr class="separator:ga0a23825d334858f643dd8bdeeac557c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb022733e8a876fee569991cb5c548f3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gabb022733e8a876fee569991cb5c548f3">XCLK_WIZ_IER_CLK1_GLITCH_MASK</a>&#160;&#160;&#160;0x00000200</td></tr>
<tr class="memdesc:gabb022733e8a876fee569991cb5c548f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 has glitch.  <a href="#gabb022733e8a876fee569991cb5c548f3">More...</a><br/></td></tr>
<tr class="separator:gabb022733e8a876fee569991cb5c548f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f63ddcc1041b05a1da8790ce88064b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga1f63ddcc1041b05a1da8790ce88064b2">XCLK_WIZ_IER_CLK0_GLITCH_MASK</a>&#160;&#160;&#160;0x00000100</td></tr>
<tr class="memdesc:ga1f63ddcc1041b05a1da8790ce88064b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 has glitch.  <a href="#ga1f63ddcc1041b05a1da8790ce88064b2">More...</a><br/></td></tr>
<tr class="separator:ga1f63ddcc1041b05a1da8790ce88064b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8ed2bdc3136a5a915c0ff8902c93e6f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab8ed2bdc3136a5a915c0ff8902c93e6f">XCLK_WIZ_IER_CLK3_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:gab8ed2bdc3136a5a915c0ff8902c93e6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 is less than specification.  <a href="#gab8ed2bdc3136a5a915c0ff8902c93e6f">More...</a><br/></td></tr>
<tr class="separator:gab8ed2bdc3136a5a915c0ff8902c93e6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe0932d7fe457fcf7530e782de0b1b08"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gabe0932d7fe457fcf7530e782de0b1b08">XCLK_WIZ_IER_CLK2_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:gabe0932d7fe457fcf7530e782de0b1b08"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 is less than specification.  <a href="#gabe0932d7fe457fcf7530e782de0b1b08">More...</a><br/></td></tr>
<tr class="separator:gabe0932d7fe457fcf7530e782de0b1b08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga057dc5e6b87b7ba9333ec0e44ac40c9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga057dc5e6b87b7ba9333ec0e44ac40c9a">XCLK_WIZ_IER_CLK1_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga057dc5e6b87b7ba9333ec0e44ac40c9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 is less than specification.  <a href="#ga057dc5e6b87b7ba9333ec0e44ac40c9a">More...</a><br/></td></tr>
<tr class="separator:ga057dc5e6b87b7ba9333ec0e44ac40c9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga125707922533b9049f08dd26271519d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga125707922533b9049f08dd26271519d5">XCLK_WIZ_IER_CLK0_MINFREQ_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga125707922533b9049f08dd26271519d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 is less than specification.  <a href="#ga125707922533b9049f08dd26271519d5">More...</a><br/></td></tr>
<tr class="separator:ga125707922533b9049f08dd26271519d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32f362272205283dba350e23e7222a3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga32f362272205283dba350e23e7222a3a">XCLK_WIZ_IER_CLK3_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga32f362272205283dba350e23e7222a3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 3 is max than specification.  <a href="#ga32f362272205283dba350e23e7222a3a">More...</a><br/></td></tr>
<tr class="separator:ga32f362272205283dba350e23e7222a3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0e663b1df0fb873cbbe96967b980426b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0e663b1df0fb873cbbe96967b980426b">XCLK_WIZ_IER_CLK2_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga0e663b1df0fb873cbbe96967b980426b"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 2 is max than specification.  <a href="#ga0e663b1df0fb873cbbe96967b980426b">More...</a><br/></td></tr>
<tr class="separator:ga0e663b1df0fb873cbbe96967b980426b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c45e5d3fad76bf173750242c885e3d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga8c45e5d3fad76bf173750242c885e3d4">XCLK_WIZ_IER_CLK1_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga8c45e5d3fad76bf173750242c885e3d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 1 is max than specification.  <a href="#ga8c45e5d3fad76bf173750242c885e3d4">More...</a><br/></td></tr>
<tr class="separator:ga8c45e5d3fad76bf173750242c885e3d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0119267bfa918f08ca0a11de0951b2ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga0119267bfa918f08ca0a11de0951b2ab">XCLK_WIZ_IER_CLK0_MAXFREQ_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga0119267bfa918f08ca0a11de0951b2ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">User clock 0 is max than specification.  <a href="#ga0119267bfa918f08ca0a11de0951b2ab">More...</a><br/></td></tr>
<tr class="separator:ga0119267bfa918f08ca0a11de0951b2ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7bb1dd7a981035a3aa91248e00ae98ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga7bb1dd7a981035a3aa91248e00ae98ad">XCLK_WIZ_IER_CLK3_STOP_SHIFT</a>&#160;&#160;&#160;15</td></tr>
<tr class="memdesc:ga7bb1dd7a981035a3aa91248e00ae98ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 stop.  <a href="#ga7bb1dd7a981035a3aa91248e00ae98ad">More...</a><br/></td></tr>
<tr class="separator:ga7bb1dd7a981035a3aa91248e00ae98ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafbb37482481fd93ec9ab5253a0796fd7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gafbb37482481fd93ec9ab5253a0796fd7">XCLK_WIZ_IER_CLK2_STOP_SHIFT</a>&#160;&#160;&#160;14</td></tr>
<tr class="memdesc:gafbb37482481fd93ec9ab5253a0796fd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 stop.  <a href="#gafbb37482481fd93ec9ab5253a0796fd7">More...</a><br/></td></tr>
<tr class="separator:gafbb37482481fd93ec9ab5253a0796fd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga44438e619f42b96ccc021a1c3063f6b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga44438e619f42b96ccc021a1c3063f6b8">XCLK_WIZ_IER_CLK1_STOP_SHIFT</a>&#160;&#160;&#160;13</td></tr>
<tr class="memdesc:ga44438e619f42b96ccc021a1c3063f6b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 stop.  <a href="#ga44438e619f42b96ccc021a1c3063f6b8">More...</a><br/></td></tr>
<tr class="separator:ga44438e619f42b96ccc021a1c3063f6b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2872e30e84d68905c43bd7806cc83fa0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga2872e30e84d68905c43bd7806cc83fa0">XCLK_WIZ_IER_CLK0_STOP_SHIFT</a>&#160;&#160;&#160;12</td></tr>
<tr class="memdesc:ga2872e30e84d68905c43bd7806cc83fa0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 stop.  <a href="#ga2872e30e84d68905c43bd7806cc83fa0">More...</a><br/></td></tr>
<tr class="separator:ga2872e30e84d68905c43bd7806cc83fa0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1ca586bbfdafb1acb2ce1fd97a4902b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga1ca586bbfdafb1acb2ce1fd97a4902b1">XCLK_WIZ_IER_CLK3_GLITCH_SHIFT</a>&#160;&#160;&#160;11</td></tr>
<tr class="memdesc:ga1ca586bbfdafb1acb2ce1fd97a4902b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 glitch.  <a href="#ga1ca586bbfdafb1acb2ce1fd97a4902b1">More...</a><br/></td></tr>
<tr class="separator:ga1ca586bbfdafb1acb2ce1fd97a4902b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac99c7c36e58c2177e35f81ea3ce1c60"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gaac99c7c36e58c2177e35f81ea3ce1c60">XCLK_WIZ_IER_CLK2_GLITCH_SHIFT</a>&#160;&#160;&#160;10</td></tr>
<tr class="memdesc:gaac99c7c36e58c2177e35f81ea3ce1c60"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 glitch.  <a href="#gaac99c7c36e58c2177e35f81ea3ce1c60">More...</a><br/></td></tr>
<tr class="separator:gaac99c7c36e58c2177e35f81ea3ce1c60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga19877011447febc4438bc39978270229"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga19877011447febc4438bc39978270229">XCLK_WIZ_IER_CLK1_GLITCH_SHIFT</a>&#160;&#160;&#160;9</td></tr>
<tr class="memdesc:ga19877011447febc4438bc39978270229"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 glitch.  <a href="#ga19877011447febc4438bc39978270229">More...</a><br/></td></tr>
<tr class="separator:ga19877011447febc4438bc39978270229"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad55c9367027a06417ae89436f7ba3b77"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gad55c9367027a06417ae89436f7ba3b77">XCLK_WIZ_IER_CLK0_GLITCH_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gad55c9367027a06417ae89436f7ba3b77"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 glitch.  <a href="#gad55c9367027a06417ae89436f7ba3b77">More...</a><br/></td></tr>
<tr class="separator:gad55c9367027a06417ae89436f7ba3b77"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2073518a02f6716b33fd721eed2740b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga2073518a02f6716b33fd721eed2740b5">XCLK_WIZ_IER_CLK3_MINFREQ_SHIFT</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:ga2073518a02f6716b33fd721eed2740b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 less.  <a href="#ga2073518a02f6716b33fd721eed2740b5">More...</a><br/></td></tr>
<tr class="separator:ga2073518a02f6716b33fd721eed2740b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d7b6317ea1bc997bac64ff903f253b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga9d7b6317ea1bc997bac64ff903f253b8">XCLK_WIZ_IER_CLK2_MINFREQ_SHIFT</a>&#160;&#160;&#160;6</td></tr>
<tr class="memdesc:ga9d7b6317ea1bc997bac64ff903f253b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 less.  <a href="#ga9d7b6317ea1bc997bac64ff903f253b8">More...</a><br/></td></tr>
<tr class="separator:ga9d7b6317ea1bc997bac64ff903f253b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8e862f52dce0734899a9b851b0b59b7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga8e862f52dce0734899a9b851b0b59b7e">XCLK_WIZ_IER_CLK1_MINFREQ_SHIFT</a>&#160;&#160;&#160;5</td></tr>
<tr class="memdesc:ga8e862f52dce0734899a9b851b0b59b7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 less.  <a href="#ga8e862f52dce0734899a9b851b0b59b7e">More...</a><br/></td></tr>
<tr class="separator:ga8e862f52dce0734899a9b851b0b59b7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9429606a7f041a1c7995a01b3b16c83f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga9429606a7f041a1c7995a01b3b16c83f">XCLK_WIZ_IER_CLK0_MINFREQ_SHIFT</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:ga9429606a7f041a1c7995a01b3b16c83f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 less.  <a href="#ga9429606a7f041a1c7995a01b3b16c83f">More...</a><br/></td></tr>
<tr class="separator:ga9429606a7f041a1c7995a01b3b16c83f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5528da0dd2acef0622e92b42cde63b30"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga5528da0dd2acef0622e92b42cde63b30">XCLK_WIZ_IER_CLK3_MAXFREQ_SHIFT</a>&#160;&#160;&#160;3</td></tr>
<tr class="memdesc:ga5528da0dd2acef0622e92b42cde63b30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 3 max.  <a href="#ga5528da0dd2acef0622e92b42cde63b30">More...</a><br/></td></tr>
<tr class="separator:ga5528da0dd2acef0622e92b42cde63b30"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb60b1ae1eb59840446df19b84379396"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gabb60b1ae1eb59840446df19b84379396">XCLK_WIZ_IER_CLK2_MAXFREQ_SHIFT</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:gabb60b1ae1eb59840446df19b84379396"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 2 max.  <a href="#gabb60b1ae1eb59840446df19b84379396">More...</a><br/></td></tr>
<tr class="separator:gabb60b1ae1eb59840446df19b84379396"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9224e9f271c5ab6f75811dc297c10db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#gab9224e9f271c5ab6f75811dc297c10db">XCLK_WIZ_IER_CLK1_MAXFREQ_SHIFT</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:gab9224e9f271c5ab6f75811dc297c10db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 1 max.  <a href="#gab9224e9f271c5ab6f75811dc297c10db">More...</a><br/></td></tr>
<tr class="separator:gab9224e9f271c5ab6f75811dc297c10db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4e61a8e24258a5c6eed44bb975b681a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___overview.html#ga4e61a8e24258a5c6eed44bb975b681a6">XCLK_WIZ_IER_CLK0_MAXFREQ_SHIFT</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga4e61a8e24258a5c6eed44bb975b681a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift bits for User clock 0 max.  <a href="#ga4e61a8e24258a5c6eed44bb975b681a6">More...</a><br/></td></tr>
<tr class="separator:ga4e61a8e24258a5c6eed44bb975b681a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga5b78de754a5a563c46cc4364b9698488"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_CLKOUT0_MX_SHIFT&#160;&#160;&#160;9</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for MUX. </p>

</div>
</div>
<a class="anchor" id="gac7482b3e0a5b624637346bee0811515d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
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          <td class="memname">#define XCLK_WIZ_CLKOUT0_P5EN_SHIFT&#160;&#160;&#160;13</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for P5EN. </p>

</div>
</div>
<a class="anchor" id="gae826d18d7971be10836d3804ad4ed38e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_CLKOUT0_P5FEDGE_MASK&#160;&#160;&#160;(1 &lt;&lt; 15)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mask for P5EDGE. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga5da48627691e7e979b7c4fbcb608796a">XClk_Wiz_GetRate()</a>.</p>

</div>
</div>
<a class="anchor" id="gae49b1d691b76f209b89e751b7d091d43"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_CLKOUT0_P5FEDGE_SHIFT&#160;&#160;&#160;15</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for P5EDGE. </p>

</div>
</div>
<a class="anchor" id="ga26c3e66c06696502f24f013c0da90e55"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_CLKOUT0_PREDIV2_SHIFT&#160;&#160;&#160;11</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for Prediv2. </p>

</div>
</div>
<a class="anchor" id="gaa454fd2cfc7ed730c52b747b72de71ef"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_ALLINTR_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>All interrupts enable mask. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a1fb9a1ea241c6aaff3831259bcc6448f">ClkWiz_IntrExample()</a>, <a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings()</a>, <a class="el" href="group___overview.html#gab48767fd035d10bd40cec167cdd7778d">XClk_Wiz_InterruptClear()</a>, <a class="el" href="group___overview.html#gab75c6d3b3e928e8cfcf136e93cdf20b2">XClk_Wiz_InterruptDisable()</a>, and <a class="el" href="group___overview.html#ga4f547fb0dce8abc367979e38081a5080">XClk_Wiz_InterruptEnable()</a>.</p>

</div>
</div>
<a class="anchor" id="ga18e65431f48acae3734420b5f3ffa490"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_ALLINTR_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>All interrupts enable shift bits. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1f63ddcc1041b05a1da8790ce88064b2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_GLITCH_MASK&#160;&#160;&#160;0x00000100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 has glitch. </p>

</div>
</div>
<a class="anchor" id="gad55c9367027a06417ae89436f7ba3b77"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_GLITCH_SHIFT&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 glitch. </p>

</div>
</div>
<a class="anchor" id="ga0119267bfa918f08ca0a11de0951b2ab"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_MAXFREQ_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 is max than specification. </p>

</div>
</div>
<a class="anchor" id="ga4e61a8e24258a5c6eed44bb975b681a6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_MAXFREQ_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 max. </p>

</div>
</div>
<a class="anchor" id="ga125707922533b9049f08dd26271519d5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_MINFREQ_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 is less than specification. </p>

</div>
</div>
<a class="anchor" id="ga9429606a7f041a1c7995a01b3b16c83f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_MINFREQ_SHIFT&#160;&#160;&#160;4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 less. </p>

</div>
</div>
<a class="anchor" id="gac73712dd09ff0df8c1d71a53e4c826ce"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_STOP_MASK&#160;&#160;&#160;0x00001000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 stopped. </p>

</div>
</div>
<a class="anchor" id="ga2872e30e84d68905c43bd7806cc83fa0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK0_STOP_SHIFT&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 stop. </p>

</div>
</div>
<a class="anchor" id="gabb022733e8a876fee569991cb5c548f3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_GLITCH_MASK&#160;&#160;&#160;0x00000200</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 has glitch. </p>

</div>
</div>
<a class="anchor" id="ga19877011447febc4438bc39978270229"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_GLITCH_SHIFT&#160;&#160;&#160;9</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 glitch. </p>

</div>
</div>
<a class="anchor" id="ga8c45e5d3fad76bf173750242c885e3d4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_MAXFREQ_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 is max than specification. </p>

</div>
</div>
<a class="anchor" id="gab9224e9f271c5ab6f75811dc297c10db"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_MAXFREQ_SHIFT&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 max. </p>

</div>
</div>
<a class="anchor" id="ga057dc5e6b87b7ba9333ec0e44ac40c9a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_MINFREQ_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 is less than specification. </p>

</div>
</div>
<a class="anchor" id="ga8e862f52dce0734899a9b851b0b59b7e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_MINFREQ_SHIFT&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 less. </p>

</div>
</div>
<a class="anchor" id="gaea0e4748f55d38744ca6f95ccd68a1ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_STOP_MASK&#160;&#160;&#160;0x00002000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 stopped. </p>

</div>
</div>
<a class="anchor" id="ga44438e619f42b96ccc021a1c3063f6b8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK1_STOP_SHIFT&#160;&#160;&#160;13</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 stop. </p>

</div>
</div>
<a class="anchor" id="ga0a23825d334858f643dd8bdeeac557c8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_GLITCH_MASK&#160;&#160;&#160;0x00000400</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 has glitch. </p>

</div>
</div>
<a class="anchor" id="gaac99c7c36e58c2177e35f81ea3ce1c60"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_GLITCH_SHIFT&#160;&#160;&#160;10</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 glitch. </p>

</div>
</div>
<a class="anchor" id="ga0e663b1df0fb873cbbe96967b980426b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_MAXFREQ_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 is max than specification. </p>

</div>
</div>
<a class="anchor" id="gabb60b1ae1eb59840446df19b84379396"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_MAXFREQ_SHIFT&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 max. </p>

</div>
</div>
<a class="anchor" id="gabe0932d7fe457fcf7530e782de0b1b08"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_MINFREQ_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 is less than specification. </p>

</div>
</div>
<a class="anchor" id="ga9d7b6317ea1bc997bac64ff903f253b8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_MINFREQ_SHIFT&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 less. </p>

</div>
</div>
<a class="anchor" id="gaa29a0866b87ef2332a9e8076676e4e11"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_STOP_MASK&#160;&#160;&#160;0x00004000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 stopped. </p>

</div>
</div>
<a class="anchor" id="gafbb37482481fd93ec9ab5253a0796fd7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK2_STOP_SHIFT&#160;&#160;&#160;14</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 stop. </p>

</div>
</div>
<a class="anchor" id="ga0df64f19a3ed2d4a49889b9ca8bfbb3a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_GLITCH_MASK&#160;&#160;&#160;0x00000800</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 has glitch. </p>

</div>
</div>
<a class="anchor" id="ga1ca586bbfdafb1acb2ce1fd97a4902b1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_GLITCH_SHIFT&#160;&#160;&#160;11</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 glitch. </p>

</div>
</div>
<a class="anchor" id="ga32f362272205283dba350e23e7222a3a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_MAXFREQ_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 is max than specification. </p>

</div>
</div>
<a class="anchor" id="ga5528da0dd2acef0622e92b42cde63b30"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_MAXFREQ_SHIFT&#160;&#160;&#160;3</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 max. </p>

</div>
</div>
<a class="anchor" id="gab8ed2bdc3136a5a915c0ff8902c93e6f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_MINFREQ_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 is less than specification. </p>

</div>
</div>
<a class="anchor" id="ga2073518a02f6716b33fd721eed2740b5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_MINFREQ_SHIFT&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 less. </p>

</div>
</div>
<a class="anchor" id="gaa19f2cd1e19eefbe675b2ca7433a6594"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_STOP_MASK&#160;&#160;&#160;0x00008000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 stopped. </p>

</div>
</div>
<a class="anchor" id="ga7bb1dd7a981035a3aa91248e00ae98ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_CLK3_STOP_SHIFT&#160;&#160;&#160;15</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 stop. </p>

</div>
</div>
<a class="anchor" id="gaab5f77647fad82a4c02eb29b8180f89b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_IER_OFFSET&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt Enable Register. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings()</a>.</p>

</div>
</div>
<a class="anchor" id="ga8e1db287d69d02c673140eae664c1a34"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_ALLINTR_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>All interrupt status register mask. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings()</a>.</p>

</div>
</div>
<a class="anchor" id="ga757264554263d3e4035a7433e43ade17"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_ALLINTR_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>All interrupts status register shift. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings()</a>.</p>

</div>
</div>
<a class="anchor" id="gabf7f48abd562e1b1389b86bb978f091e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_GLITCH_MASK&#160;&#160;&#160;0x00000100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 has glitch. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a129f20100bd1ab7e3165219f38659e90">ClkWiz_ClkGlitchEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa28febc03c84cdbbffc5ea57e4124fe7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_GLITCH_SHIFT&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 glitch. </p>

</div>
</div>
<a class="anchor" id="ga5e762fe87dddbe8ac453306748a216f5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_MAXFREQ_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 is max than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga991df75896a6505b7d17031df5216319"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_MAXFREQ_SHIFT&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 max. </p>

</div>
</div>
<a class="anchor" id="ga37ecc718da5a33c16329f6f6d1967e4e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_MINFREQ_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 is less than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga737f9a73cb6f0fe8402585a70f35492c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_MINFREQ_SHIFT&#160;&#160;&#160;4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 less. </p>

</div>
</div>
<a class="anchor" id="ga29f231a7715e94baec2277b768f5f1a5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_STOP_MASK&#160;&#160;&#160;0x00001000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 0 stopped. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a24a8c4f20358d67ba7512698e94ec60d">ClkWiz_ClkStopEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0f168b5c26d91d8aa5c92d7a4e922631"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK0_STOP_SHIFT&#160;&#160;&#160;12</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 0 stop. </p>

</div>
</div>
<a class="anchor" id="gafcb540ab2c83a559450ae71633258269"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_GLITCH_MASK&#160;&#160;&#160;0x00000200</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 has glitch. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a129f20100bd1ab7e3165219f38659e90">ClkWiz_ClkGlitchEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga6cd50be9be9ce6dda280b3200d73c236"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_GLITCH_SHIFT&#160;&#160;&#160;9</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 glitch. </p>

</div>
</div>
<a class="anchor" id="ga834ed8f9541edc0c5be94ca0de404f87"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_MAXFREQ_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 is max than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga176e2701427376ad264054f9abd3f1ba"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_MAXFREQ_SHIFT&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 max. </p>

</div>
</div>
<a class="anchor" id="ga8e3dd7df0cf46c203cab6d190c9e4cd9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_MINFREQ_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 is less than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gad4ffc8a12873db9cdcb8e31c9bfdf923"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_MINFREQ_SHIFT&#160;&#160;&#160;5</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 less. </p>

</div>
</div>
<a class="anchor" id="ga7152a10657a3caeef169c0be28087362"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_STOP_MASK&#160;&#160;&#160;0x00002000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 1 stopped. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a24a8c4f20358d67ba7512698e94ec60d">ClkWiz_ClkStopEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gab79b4b574363916c1021f811376f1660"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK1_STOP_SHIFT&#160;&#160;&#160;13</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 1 stop. </p>

</div>
</div>
<a class="anchor" id="gaa79abe7629e383c5d83f09ab640a7267"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_GLITCH_MASK&#160;&#160;&#160;0x00000400</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 has glitch. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a129f20100bd1ab7e3165219f38659e90">ClkWiz_ClkGlitchEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gac893b3b69a6950f520de28c97b80f149"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_GLITCH_SHIFT&#160;&#160;&#160;10</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 glitch. </p>

</div>
</div>
<a class="anchor" id="ga2cfaf083bfc11e4d527262c6dfe0c24e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_MAXFREQ_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 is max than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gac546d9f62ddcc7fc8584ef9de13d7bb9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_MAXFREQ_SHIFT&#160;&#160;&#160;2</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 max. </p>

</div>
</div>
<a class="anchor" id="ga24b899afdcc87e9a2c97eabe52fb610c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_MINFREQ_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 is less than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga4d719247c9dfed11e36dfacb58f25fb8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_MINFREQ_SHIFT&#160;&#160;&#160;6</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 less. </p>

</div>
</div>
<a class="anchor" id="gab7ecb70f6cf41fd44769722fdcf2a6a6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_STOP_MASK&#160;&#160;&#160;0x00004000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 2 stopped. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a24a8c4f20358d67ba7512698e94ec60d">ClkWiz_ClkStopEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf3a0cc16b3ad77228b11f05e11d6e733"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK2_STOP_SHIFT&#160;&#160;&#160;14</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 2 stop. </p>

</div>
</div>
<a class="anchor" id="ga5634a366b8ced209061e028c163fddd5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_GLITCH_MASK&#160;&#160;&#160;0x00000800</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 has glitch. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a129f20100bd1ab7e3165219f38659e90">ClkWiz_ClkGlitchEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0914e2de55970b885f8c50667b85c8f3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_GLITCH_SHIFT&#160;&#160;&#160;11</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 glitch. </p>

</div>
</div>
<a class="anchor" id="ga9a3354cec0d629d0ed3c26d28bbd1994"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_MAXFREQ_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 is max than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5f70d46d84d4629688388134ebc3dca6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_MAXFREQ_SHIFT&#160;&#160;&#160;3</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 max. </p>

</div>
</div>
<a class="anchor" id="ga163b2686ce7e37b98fc9d510a95febdb"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_MINFREQ_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 is less than specification. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#abf464e4d1be9b2b093b568d721920bb2">ClkWiz_ClkOutOfRangeEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf702d2921c3b616066cfd2e76de620b2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_MINFREQ_SHIFT&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 less. </p>

</div>
</div>
<a class="anchor" id="ga6a11cf2b70a1598342cde6ad50577ec9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_STOP_MASK&#160;&#160;&#160;0x00008000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock 3 stopped. </p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a24a8c4f20358d67ba7512698e94ec60d">ClkWiz_ClkStopEventHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga546bf7c1903e83e52e69fbaa1d603343"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLK3_STOP_SHIFT&#160;&#160;&#160;15</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift bits for User clock 3 stop. </p>

</div>
</div>
<a class="anchor" id="ga868aa5dd6399404298d686e73a44a565"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLKALL_GLITCH_MASK&#160;&#160;&#160;0x00000F00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock[0-3] has glitch. </p>

<p>Referenced by <a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7b6a6f0f1fda56cdb7b97a293e9ee72e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLKALL_MAXFREQ_MASK&#160;&#160;&#160;0x0000000F</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock[0-3] is max than specification. </p>

<p>Referenced by <a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga9cfc8a66cb70f62b8546fb4b9a448d50"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLKALL_MINFREQ_MASK&#160;&#160;&#160;0x000000F0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock[0-3] is min than specification. </p>

<p>Referenced by <a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga82daa29abf414a316c26355e3771cf88"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_CLKALL_STOP_MASK&#160;&#160;&#160;0x0000F000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>User clock[0-3] has stopped. </p>

<p>Referenced by <a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga54bfc49d1a188b798cb96cfd40a0dc54"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_ISR_OFFSET&#160;&#160;&#160;0x0000000C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt Status Register. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga3ad6007a242ec441ccb612d7ff2050c0">XClk_Wiz_GetInterruptSettings()</a>.</p>

</div>
</div>
<a class="anchor" id="ga8d853c1eaeeb4b89d06b7de0ff13d999"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XCLK_WIZ_RECONFIG_OFFSET&#160;&#160;&#160;0x00000014</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reconfig Register. </p>

<p>Referenced by <a class="el" href="xclk__wiz__versal__example_8c.html#ab29b199c8ec2cd0ed0fee03752826661">ClkWiz_Example()</a>.</p>

</div>
</div>
<a class="anchor" id="ga142028c206e507df8633d0b91b0ef273"></a>
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          <td class="memname">#define XCLK_WIZ_REG12_EDGE_SHIFT&#160;&#160;&#160;10</td>
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<p>Shift bits for Edge. </p>

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<p>Shift bits for Edge. </p>

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<p>Shift bits for Edge. </p>

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          <td class="memname">#define XCLK_WIZ_REG1_EN&#160;&#160;&#160;(1 &lt;&lt; 9)</td>
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<p>FBout enable. </p>

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<p>MX 3. </p>

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          <td class="memname">#define XCLK_WIZ_REG1_PREDIV2&#160;&#160;&#160;(1 &lt;&lt; 12)</td>
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<p>Prediv2 3. </p>

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<p>MX. </p>

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          <td class="memname">#define XCLK_WIZ_REG3_PREDIV2&#160;&#160;&#160;(1 &lt;&lt; 11)</td>
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<p>Prediv2 3. </p>

<p>Referenced by <a class="el" href="group___overview.html#ga5da48627691e7e979b7c4fbcb608796a">XClk_Wiz_GetRate()</a>.</p>

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<p>Prediv2 3. </p>

<p>Referenced by <a class="el" href="group___overview.html#gac6b82e8b7e00bc66dd233345a4cb5c41">XClk_Wiz_DisableClock()</a>, and <a class="el" href="group___overview.html#ga0965f9b5b43c453ca70e8b43f03490ca">XClk_Wiz_EnableClock()</a>.</p>

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          <td class="memname">#define XCLK_WIZ_STATUS_OFFSET&#160;&#160;&#160;0x00000004</td>
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<p>Status Register. </p>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>, and <a class="el" href="group___overview.html#gacf581607624ee4f19e501ff7802101db">XClk_Wiz_WaitForLock()</a>.</p>

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<h2 class="groupheader">Typedef Documentation</h2>
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          <td class="memname">typedef void(* XClk_Wiz_CallBack)(void *CallBackRef, u32 Mask)</td>
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<p>Callback type for all interrupts defined. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. </td></tr>
    <tr><td class="paramname">Mask</td><td>is a bit mask indicating the cause of the event. For current core version, this parameter is "OR" of 0 or more XCLK_WIZ_ISR_*_MASK constants defined in xclmon_hw.h.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">u32 XClk_Wiz_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz___config.html">XClk_Wiz_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Initialize the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance provided by the caller based on the given Config structure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is the device configuration structure containing information about a specific CLK_WIZ. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Initialization was successful.</li>
<li>XST_FAILURE Initialization was failure.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz___config.html#aa737385b3fd370d1bb677f0b366cdbd0">XClk_Wiz_Config::BaseAddr</a>, <a class="el" href="struct_x_clk___wiz.html#a006de5f883be8c8025c870a326f1daff">XClk_Wiz::ClkGlitchCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#aa0ca3d6f96f2224007f40552048eb747">XClk_Wiz::ClkOutOfRangeCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a48c00841fd4a6cfff0c50c9ec204458e">XClk_Wiz::ClkStopCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz.html#a492db8cdab7648eb930008b5caa3db72">XClk_Wiz::ErrorCallBack</a>, and <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>, and <a class="el" href="xclk__wiz__intr__example_8c.html#a1fb9a1ea241c6aaff3831259bcc6448f">ClkWiz_IntrExample()</a>.</p>

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          <td class="memname">u32 XClk_Wiz_DisableClock </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ClockId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Disable Clock for the given ClockId. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">ClockId</td><td>is the output clock.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Initialization was successful.</li>
<li>XST_FAILURE Initialization was failure. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz___config.html#aa737385b3fd370d1bb677f0b366cdbd0">XClk_Wiz_Config::BaseAddr</a>, <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, and <a class="el" href="group___overview.html#ga9c0c8a7ada27a0cfba39c0f3aa922c7d">XCLK_WIZ_REG3_USED</a>.</p>

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          <td class="memname">u32 XClk_Wiz_EnableClock </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ClockId</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Enable Clock for the given ClockId. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">ClockId</td><td>is the output clock.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Initialization was successful.</li>
<li>XST_FAILURE Initialization was failure. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz___config.html#aa737385b3fd370d1bb677f0b366cdbd0">XClk_Wiz_Config::BaseAddr</a>, <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, and <a class="el" href="group___overview.html#ga9c0c8a7ada27a0cfba39c0f3aa922c7d">XCLK_WIZ_REG3_USED</a>.</p>

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          <td class="memname">void XClk_Wiz_GetInterruptSettings </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>XClk_Wiz_GetInterruptSettings will get the information from clock wizard IER and ISR Registers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a46c660b9cf4d9720d60887b9a02677ae">XClk_Wiz::ClkIntrEnable</a>, <a class="el" href="struct_x_clk___wiz.html#a6f13187ddd0c7ff4e949d9fba7368a2a">XClk_Wiz::ClkWizIntrStatus</a>, <a class="el" href="group___overview.html#gaa454fd2cfc7ed730c52b747b72de71ef">XCLK_WIZ_IER_ALLINTR_MASK</a>, <a class="el" href="group___overview.html#ga18e65431f48acae3734420b5f3ffa490">XCLK_WIZ_IER_ALLINTR_SHIFT</a>, <a class="el" href="group___overview.html#gaab5f77647fad82a4c02eb29b8180f89b">XCLK_WIZ_IER_OFFSET</a>, <a class="el" href="group___overview.html#ga8e1db287d69d02c673140eae664c1a34">XCLK_WIZ_ISR_ALLINTR_MASK</a>, <a class="el" href="group___overview.html#ga757264554263d3e4035a7433e43ade17">XCLK_WIZ_ISR_ALLINTR_SHIFT</a>, and <a class="el" href="group___overview.html#ga54bfc49d1a188b798cb96cfd40a0dc54">XCLK_WIZ_ISR_OFFSET</a>.</p>

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          <td class="memname">s32 XClk_Wiz_GetRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ClockId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64 *&#160;</td>
          <td class="paramname"><em>Rate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Get the clock frequency for the given ClockId. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">ClockId</td><td>is the output clock. </td></tr>
    <tr><td class="paramname">Rate</td><td>clock rate in Hz.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS getting the frequency was successful.</li>
<li>XST_FAILURE getting the frequency failed. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz___config.html#ad27e675e3da734bc59621ddb146dc927">XClk_Wiz_Config::NumClocks</a>, <a class="el" href="group___overview.html#gae826d18d7971be10836d3804ad4ed38e">XCLK_WIZ_CLKOUT0_P5FEDGE_MASK</a>, and <a class="el" href="group___overview.html#ga0e335ce1a067f54477c247e74a4dbc3d">XCLK_WIZ_REG3_PREDIV2</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>.</p>

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          <td class="memname">void XClk_Wiz_InterruptClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>XClk_Wiz_InterruptClear will clear the interrupts set in the Interrupt Status Register of the CLK_WIZ core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on </td></tr>
    <tr><td class="paramname">Mask</td><td>is Interrupt Mask with bits set for corresponding interrupt to be cleared in the Interrupt Status register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group___overview.html#gaa454fd2cfc7ed730c52b747b72de71ef">XCLK_WIZ_IER_ALLINTR_MASK</a>.</p>

<p>Referenced by <a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler()</a>.</p>

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          <td class="memname">void XClk_Wiz_InterruptDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>XClk_Wiz_InterruptDisable will disable the interrupts present in the interrupt mask passed onto the function. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on </td></tr>
    <tr><td class="paramname">Mask</td><td>is the interrupt mask which need to be enabled in core</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group___overview.html#gaa454fd2cfc7ed730c52b747b72de71ef">XCLK_WIZ_IER_ALLINTR_MASK</a>.</p>

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          <td class="memname">void XClk_Wiz_InterruptEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>XClk_Wiz_InterruptEnable will enable the interrupts present in the interrupt mask passed onto the function. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on </td></tr>
    <tr><td class="paramname">Mask</td><td>is the interrupt mask which need to be enabled in core</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group___overview.html#gaa454fd2cfc7ed730c52b747b72de71ef">XCLK_WIZ_IER_ALLINTR_MASK</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a1fb9a1ea241c6aaff3831259bcc6448f">ClkWiz_IntrExample()</a>.</p>

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          <td class="memname">u32 XClk_Wiz_InterruptGetEnabled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>XClk_Wiz_InterruptGetEnabled will get the interrupt mask set (enabled) in the CLK_WIZ core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Interrupt Mask with bits set for corresponding interrupt in Interrupt enable register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

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          <td class="memname">u32 XClk_Wiz_InterruptGetStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>XClk_Wiz_InterruptGetStatus will get the list of interrupts pending in the Interrupt Status Register of the CLK_WIZ core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Interrupt Mask with bits set for corresponding interrupt in Interrupt Status register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>Referenced by <a class="el" href="group___overview.html#gab4d4ca4b2b5d036b0e0df621692135f6">XClk_Wiz_IntrHandler()</a>.</p>

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          <td class="memname">void XClk_Wiz_IntrHandler </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function is the interrupt handler for the CLK_WIZ core. </p>
<p>This handler reads the pending interrupt from the Interrupt Status register determines the source of the interrupts and calls the respective callbacks for the interrupts that are enabled in Interrupt Enable register and finally clears the interrupts.</p>
<p>The application is responsible for connecting this function to the interrupt system. Application beyond this core is also responsible for providing callbacks to handle interrupts and installing the callbacks using <a class="el" href="group___overview.html#ga57d65e65942c50b405b79dacf4704339" title="This routine installs an asynchronous callback function for the given HandlerType: ...">XClk_Wiz_SetCallBack()</a> during initialization phase.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Interrupt should be enabled to execute interrupt handler. </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a006de5f883be8c8025c870a326f1daff">XClk_Wiz::ClkGlitchCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a91ba0b071bb596329ac28cb31f149596">XClk_Wiz::ClkGlitchRef</a>, <a class="el" href="struct_x_clk___wiz.html#aa0ca3d6f96f2224007f40552048eb747">XClk_Wiz::ClkOutOfRangeCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#adc84e5f595cf0448bfe4573f3b9095bd">XClk_Wiz::ClkOutOfRangeRef</a>, <a class="el" href="struct_x_clk___wiz.html#a48c00841fd4a6cfff0c50c9ec204458e">XClk_Wiz::ClkStopCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a874f6dfbb1c2fb1a35fb30f1035f6918">XClk_Wiz::ClkStopRef</a>, <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, <a class="el" href="group___overview.html#gab48767fd035d10bd40cec167cdd7778d">XClk_Wiz_InterruptClear()</a>, <a class="el" href="group___overview.html#gaf5850b23acf450ae86fcc514f052256e">XClk_Wiz_InterruptGetStatus()</a>, <a class="el" href="group___overview.html#ga868aa5dd6399404298d686e73a44a565">XCLK_WIZ_ISR_CLKALL_GLITCH_MASK</a>, <a class="el" href="group___overview.html#ga7b6a6f0f1fda56cdb7b97a293e9ee72e">XCLK_WIZ_ISR_CLKALL_MAXFREQ_MASK</a>, <a class="el" href="group___overview.html#ga9cfc8a66cb70f62b8546fb4b9a448d50">XCLK_WIZ_ISR_CLKALL_MINFREQ_MASK</a>, and <a class="el" href="group___overview.html#ga82daa29abf414a316c26355e3771cf88">XCLK_WIZ_ISR_CLKALL_STOP_MASK</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a1fb9a1ea241c6aaff3831259bcc6448f">ClkWiz_IntrExample()</a>, and <a class="el" href="xclk__wiz__intr__example_8c.html#aa33a11c5d5f2eae8e4ab36e0bdb6e38d">SetupInterruptSystem()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_clk___wiz___config.html">XClk_Wiz_Config</a> * XClk_Wiz_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Look up the hardware configuration for a device instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the unique device ID of the device to lookup for</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The reference to the configuration record in the configuration table (in xclk_wiz_g.c) corresponding to the Device ID or if not found, a NULL pointer is returned.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>, and <a class="el" href="xclk__wiz__intr__example_8c.html#a1fb9a1ea241c6aaff3831259bcc6448f">ClkWiz_IntrExample()</a>.</p>

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          <td class="memname">int XClk_Wiz_SetCallBack </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>HandleType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This routine installs an asynchronous callback function for the given HandlerType: </p>
<pre></pre><pre>HandlerType                             Invoked by this driver when:
-----------------------  --------------------------------------------------
XCLK_WIZ_HANDLER_CLK_OUTOF_RANGE        Clock under flow/over flow
XCLK_WIZ_HANDLER_CLK_GLITCH             Clock Glitch
XCLK_WIZ_HANDLER_CLK_STOP               Clock Stop
XCLK_WIZ_HANDLER_OTHERERROR             Any other type of interrupts
</pre><dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on</td></tr>
    <tr><td class="paramname">HandleType</td><td>is the type of call back to be registered.</td></tr>
    <tr><td class="paramname">CallBackFunc</td><td>is the pointer to a call back funtion which is called when a particular event occurs.</td></tr>
    <tr><td class="paramname">CallBackRef</td><td>is a void pointer to data to be referenced to by the CallBackFunc</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS when handler is installed.</li>
</ul>
</dd></dl>
<ul>
<li>XST_INVALID_PARAM when HandlerType is invalid.</li>
</ul>
<dl class="section note"><dt>Note</dt><dd>Invoking this function for a handler that already has been installed replaces it with the new handler. </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a006de5f883be8c8025c870a326f1daff">XClk_Wiz::ClkGlitchCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a91ba0b071bb596329ac28cb31f149596">XClk_Wiz::ClkGlitchRef</a>, <a class="el" href="struct_x_clk___wiz.html#aa0ca3d6f96f2224007f40552048eb747">XClk_Wiz::ClkOutOfRangeCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#adc84e5f595cf0448bfe4573f3b9095bd">XClk_Wiz::ClkOutOfRangeRef</a>, <a class="el" href="struct_x_clk___wiz.html#a48c00841fd4a6cfff0c50c9ec204458e">XClk_Wiz::ClkStopCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a874f6dfbb1c2fb1a35fb30f1035f6918">XClk_Wiz::ClkStopRef</a>, <a class="el" href="struct_x_clk___wiz.html#a492db8cdab7648eb930008b5caa3db72">XClk_Wiz::ErrorCallBack</a>, <a class="el" href="struct_x_clk___wiz.html#a7c805aa6c9f8561dcdc3922f076f3416">XClk_Wiz::ErrRef</a>, and <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__intr__example_8c.html#a1fb9a1ea241c6aaff3831259bcc6448f">ClkWiz_IntrExample()</a>, and <a class="el" href="xclk__wiz__intr__example_8c.html#aa33a11c5d5f2eae8e4ab36e0bdb6e38d">SetupInterruptSystem()</a>.</p>

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          <td class="memname">void XClk_Wiz_SetInputRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">double&#160;</td>
          <td class="paramname"><em>Rate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Change the Input frequency to the given rate. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">Rate</td><td>is the frequency for which is to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Should be called only if the input provider clock is changed eg input clock is si570. </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, and <a class="el" href="struct_x_clk___wiz___config.html#ad31069e5533e4b2eedc3cdc35c43994e">XClk_Wiz_Config::PrimInClkFreq</a>.</p>

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          <td class="memname">s32 XClk_Wiz_SetLeafRateHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ClockId</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>SetRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Set the clock rate frequency for the given ClockId. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">ClockId</td><td>is the output clock. </td></tr>
    <tr><td class="paramname">SetRate</td><td>clock rate in Hz.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Setting the rate was successful.</li>
<li>XST_FAILURE Setting rate was failed. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>.</p>

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          <td class="memname">void XClk_Wiz_SetMinErr </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>Minerr</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Set the Minimum error that can be tolerated. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">Minerr</td><td>is the error margin that can be tolerated in Hz.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Should be called only if there is only one output clock. </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>.</p>

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          <td class="memname">u32 XClk_Wiz_SetRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>SetRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Change the frequency to the given rate. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">SetRate</td><td>is the frequency for which is requested in MHz.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS frequency setting was successful.</li>
<li>XST_FAILURE frequency setting failed.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Should be called only if there is only one output clock. </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz___config.html#aa737385b3fd370d1bb677f0b366cdbd0">XClk_Wiz_Config::BaseAddr</a>, <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, and <a class="el" href="struct_x_clk___wiz___config.html#ad27e675e3da734bc59621ddb146dc927">XClk_Wiz_Config::NumClocks</a>.</p>

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          <td class="memname">u32 XClk_Wiz_SetRateHz </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>SetRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Change the frequency to the given rate in Hz. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on. </td></tr>
    <tr><td class="paramname">SetRate</td><td>is the frequency in Hz to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Frequency setting was successful.</li>
<li>XST_FAILURE frequency setting failed.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Should be called only if there is only one output clock. </dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz___config.html#aa737385b3fd370d1bb677f0b366cdbd0">XClk_Wiz_Config::BaseAddr</a>, <a class="el" href="struct_x_clk___wiz.html#a28ae78d16753f81178e32cdbb0758e52">XClk_Wiz::Config</a>, <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, and <a class="el" href="struct_x_clk___wiz___config.html#ad27e675e3da734bc59621ddb146dc927">XClk_Wiz_Config::NumClocks</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>.</p>

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<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">u32 XClk_Wiz_WaitForLock </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_clk___wiz.html">XClk_Wiz</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Wait till the clocking wizard is locked to the frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_clk___wiz.html" title="The XClk_Wiz driver instance data. ">XClk_Wiz</a> instance to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if lock was successful.</li>
<li>XST_FAILURE on timeout. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_clk___wiz.html#a8d30680f0e4edf48a59f5391aeb4df29">XClk_Wiz::IsReady</a>, and <a class="el" href="group___overview.html#ga1130a3203681c537950cc8229a696105">XCLK_WIZ_STATUS_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="xclk__wiz__setrate__example_8c.html#a35fe542e629f6c41502f67458005acb1">ClkWiz_Example()</a>.</p>

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